We are looking for a Senior IC engineer for the definition and partitioning of our silicon products. The candidate will be part of an international team and he/she will be responsible of the system-level design and validation of MEMS sensor products. He will coordinate with Analog, Digital, Mechanical and Package designers to define the best MEMS-ASIC architecture for the optimal trade-off between sub-parts. He will also oversee the high-level system modelling. A proven experience in the field is required. We are looking for a competent, proactive person, with good problem-solving skills and a good team working attitude. We offer a full-time, permanent contract, with a very interesting compensation.
- Design innovative system-level solutions for sensor products, assessing different architectures and selecting the best options to satisfy product requirements.
- Translate system level requirements into Analog, Digital, Mechanical and Package sub-blocks specifications.
- Develop models for system-level simulation.
- Define system verification environment, developing test cases and verification plan.
- Support experimental validation, debug, post-silicon optimization, system tuning and failure analyses.
- Provide documentation for internal and external use.
- Master’s Degree in Electronic Engineering or equivalent.
- 8+ years of experience in integrated circuit design, sensor-related algorithms, or equivalent.
- Proven ability to optimize and develop system architecture from initial specification to physical prototype.
- Proficiency with Matlab and Simulink.
- Knowledge of the main methodologies and environments for mixed-signal modelling and verification.
- Experience in design of MEMS sensors or MEMS sensor interfaces.
- Fluent English and Italian languages.
- Willingness to travel.
Nice to have:
- Experience in technical project management.
- Knowledge of Cadence design environment.
- Knowledge of SystemVerilog, Verilog or VHDL.
- Knowledge of programming languages such as Python and C/C++
HR: Carmen Nardo